Recently, more and more consumer electronics applications require a system with no disk drive. In these applications, flash memory is often used as a primary storage device. Flash memory has become increasingly popular as it provides a type of non-volatile memory with high reliability, high density, and a small profile.
Basically, there are two types of flash memory commonly used in the foregoing consumer electronics applications, namely NOR and NAND flash memory. In use, NOR flash memory may be directly accessible through an address and data bus, similar to other memory devices such as static random access memory (SRAM)-type devices. This SRAM-like interface allows central processors to directly execute from the NOR flash memory without the need for additional on-chip memory. To this end, code may be directly executed from memory [e.g. execute-in-place (XIP), etc.].
On the other hand, NAND flash memory uses a single bus for both address and data transfer. Further, accesses to NAND flash memory take place in blocks, similar to disk drives, etc. Since NAND flash memory is up to four (4) times cheaper (per bit) with respect to NOR flash memory, it is an ideal candidate for mass storage environments. Unfortunately, however, support for XIP operations is not typically possible using NAND flash memory, since data is available for retrieval only in block format.
Thus, in the past, off-chip memory such as dynamic random access memory (DRAM), SRAM, etc. has been used for storing blocks of data retrieved from block-based NAND flash memory, prior to direct execution. To this end, the processor may directly execute code from the off-chip memory. Unfortunately, however, such a technique is not conducive to integrated and/or cost-effective solutions. Further, block-based memory is more susceptible to errors (e.g. single-bit errors, wear-leveling-related errors, manufacturing-related errors, etc.), with respect to the more reliable NOR flash memory.
Moreover, in such prior art systems, more reliable on or off-chip memory such as read only memory (ROM), NOR flash memory, electrically erasable programmable ROM (EEPROM), etc. is required to provide the processor with instructions, control logic, etc. necessary to program an associated controller to copy the blocks of data from the NAND flash memory, prior to direct execution from the off-chip memory. Again, such a technique is not conducive to providing a cost-effective solution.
There is thus a need for overcoming these and/or other problems associated with the prior art.